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| Contents | ||||||
| 1. | INTRODUCTION | 1 | ||||
| 1.1 | Wireless Communication | 1 | ||||
| 1.2 | CMOS Technology and Scaling | 2 | ||||
| 1.2.1 | Moore's Law | 2 | ||||
| 1.2.2 | RF-CMOS: Moore meets Marconi | 3 | ||||
| 1.3 | The Research Work | 4 | ||||
| 1.4 | Outline of the Work | 6 | ||||
| 2. | MOBILE COMMUNICATION SYSTEMS AND POWER AMPLIFICATION | 9 | ||||
| 2.1 | Introduction | 9 | ||||
| 2.2 | Mobile Communication Systems | 9 | ||||
| 2.2.1 | Modulated Bandpass Signals | 10 | ||||
| 2.2.2 | Digital Modulation | 13 | ||||
| 2.2.3 | Probability Density Function of the Envelope Signal | 15 | ||||
| 2.3 | Some Aspects of Power Amplification | 16 | ||||
| 2.3.1 | Output Power | 16 | ||||
| 2.3.2 | Peak Output Power and Crest Factor | 18 | ||||
| 2.3.3 | Input Power and Power Gain | 20 | ||||
| 2.3.4 | Efficiency | 20 | ||||
| 2.3.5 | Efficiency and Modulated Signals | 23 | ||||
| 2.3.6 | Power Control | 24 | ||||
| 2.3.7 | Linearity | 26 | ||||
| 2.3.8 | Inductors, Capacitors and Quality Factor | 27 | ||||
| 2.4 | Power Amplifier Classification | 30 | ||||
| 2.4.1 | Class A | 30 | ||||
| 2.4.2 | Reduced Conduction Angle: Class AB, B and C | 33 | ||||
| 2.4.3 | Saturated Class A | 40 | ||||
| 2.4.4 | Harmonic Tuning for Improved Efficiency: Class F | 44 | ||||
| 2.4.5 | Switching Amplifiers | 48 | ||||
| 2.4.6 | Class D | 49 | ||||
| 2.4.7 | Class E | 51 | ||||
| 2.4.8 | Reliability | 55 | ||||
| 2.5 | Efficiency and Linearity | 58 | ||||
| 2.5.1 | Efficiency Improvement of Linear Amplifiers | 60 | ||||
| 2.5.2 | Linearization of Nonlinear Amplifiers | 62 | ||||
| 2.6 | Conclusion | 64 | ||||
| 3. | ANALYSIS AND DESIGN OF THE CLASS E POWER AMPLIFIER IN CMOS | 65 | ||||
| 3.1 | Introduction | 65 | ||||
| 3.2 | A Theoretical Study of the Class E Amplifier | 65 | ||||
| 3.2.1 | The Class E Requirements | 65 | ||||
| 3.2.2 | Existing Methods to Solve the Class E Equations | 68 | ||||
| 3.2.3 | A State-Space Model of the Class E Power Amplifier | 69 | ||||
| 3.2.4 | Limitations of the State-Space Approach | 74 | ||||
| 3.3 | Design of the Class E Amplifier in CMOS | 75 | ||||
| 3.3.1 | Design of the Load Resistor | 75 | ||||
| 3.3.2 | Design of the DC-feed Inductance | 76 | ||||
| 3.3.3 | Design ofthen-MOS switch | 80 | ||||
| 3.3.4 | Technology Scaling | 84 | ||||
| 3.3.5 | Device Stacking | 87 | ||||
| 3.3.6 | Increasing the Operating Frequency | 92 | ||||
| 3.3.7 | Deviation from Class E: Class BE | 93 | ||||
| 3.4 | CMOS Layout Aspects | 97 | ||||
| 3.4.1 | Integrated Inductors | 97 | ||||
| 3.4.2 | Decoupling and Bondwires | 103 | ||||
| 3.5 | Conclusion | 109 | ||||
| 4. | IMPEDANCE TRANSFORMATION AND POWER COMBINATION | 111 | ||||
| 4.1 | Introduction | 111 | ||||
| 4.2 | L-match Impedance Transformation | 111 | ||||
| 4.2.1 | Basic Equations | 112 | ||||
| 4.2.2 | Inductor Loss and Efficiency | 114 | ||||
| 4.3 | Power Combination | 118 | ||||
| 4.3.1 | Basic Equations | 119 | ||||
| 4.3.2 | Inductor Loss and Efficiency | 122 | ||||
| 4.3.3 | Multi Section Lattice-Type LC Balun | 126 | ||||
| 4.3.4 | Power Control | 128 | ||||
| 4.3.5 | Multi Section LC Balun with Non-Identical Sections | 131 | ||||
| 4.3.6 | Merging the Class E Amplifier and the LC Balun | 132 | ||||
| 4.4 | Conclusion | 132 | ||||
| 5. | POLAR MODULATION | 135 | ||||
| 5.1 | Introduction | 135 | ||||
| 5.2 | The Polar Modulation Architecture | 135 | ||||
| 5.2.1 | Basic Equations | 135 | ||||
| 5.2.2 | Envelope Elimination and Restoration | 137 | ||||
| 5.2.3 | Influence ofthe Driver Stages on the Overall Efficiency | 139 | ||||
| 5.2.4 | Implementation of the Amplitude Modulator | 140 | ||||
| 5.3 | Distortion in a Polar Modulated Power Amplifier | 149 | ||||
| 5.3.1 | Nonlinear Polar Modulated Power Amplifier Models | 149 | ||||
| 5.3.2 | Feed forward | 151 | ||||
| 5.3.3 | Nonlinear on-resistance | 155 | ||||
| 5.3.4 | Nonlinear drain-bulk junction capacitance | 157 | ||||
| 5.3.5 | Differential Delay | 158 | ||||
| 5.3.6 | Envelope Filtering | 159 | ||||
| 5.3.7 | Injection ofthe Phase Signal | 166 | ||||
| 5.3.8 | Linearity Improvement Techniques | 166 | ||||
| 5.4 | Power Combination and Polar Modulation | 167 | ||||
| 5.5 | Full Digital Linearization | 170 | ||||
| 5.5.1 | A single-bit RF D-to-A | 170 | ||||
| 5.5.2 | The Lattice-type LC balun as a multi-bit RF D-to-A | 172 | ||||
| 5.6 | Conclusion | 174 | ||||
| 6. | A CMOS POWER AMPLIFIER FOR GSM-EDGE | 177 | ||||
| 6.1 | Introduction | 177 | ||||
| 6.2 | The EDGE System | 178 | ||||
| 6.2.1 | Enhanced Datarates for GSM Evolution | 178 | ||||
| 6.2.2 | Generation of the EDGE Signal | 179 | ||||
| 6.2.3 | EDGE Transmitter Linearity Requirements | 183 | ||||
| 6.2.4 | EDGE Transmitter Output Power Requirements | 185 | ||||
| 6.3 | A Polar Modulated Power Amplifier for EDGE | 185 | ||||
| 6.3.1 | Architecture | 186 | ||||
| 6.3.2 | Distortion | 187 | ||||
| 6.4 | Circuit Implementation | 192 | ||||
| 6.4.1 | Design of the RF amplifier | 192 | ||||
| 6.4.2 | Design of the Linear Amplitude Modulator | 196 | ||||
| 6.4.3 | Layout Aspects | 199 | ||||
| 6.5 | Measurements | 199 | ||||
| 6.5.1 | Measurement Setup | 199 | ||||
| 6.5.2 | Constant Envelope Measurements | 201 | ||||
| 6.5.3 | AM-AM and AM-PM Distortion Measurement | 202 | ||||
| 6.5.4 | EDGE Measurements | 204 | ||||
| 6.5.5 | 16-QAM Modulation and Two-Tone Test | 209 | ||||
| 6.6 | Architectural Improvements | 210 | ||||
| 6.7 | Comparison with Other EDGE Solutions | 212 | ||||
| 6.8 | Conclusion | 213 | ||||
| 7. | A CMOS POWER AMPLIFIER FOR BLUETOOTH | 215 | ||||
| 7.1 | Introduction | 215 | ||||
| 7.2 | The Bluetooth System | 215 | ||||
| 7.2.1 | Modulation | 216 | ||||
| 7.2.2 | Power Amplifier Requirements | 217 | ||||
| 7.2.3 | Spectral Purity and Spurious Emissions | 217 | ||||
| 7.3 | Circuit Implementation | 218 | ||||
| 7.4 | Layout Aspects | 220 | ||||
| 7.5 | Measurements | 222 | ||||
| 7.5.1 | Output Power and Efficiency | 222 | ||||
| 7.5.2 | Bluetooth Measurements | 224 | ||||
| 7.6 | Comparison with Other Work | 225 | ||||
| 7.7 | Conclusion | 227 | ||||
| 8. | CONCLUSIONS | 231 | ||||
| 8.1 | Main Contributions and Achievements | 231 | ||||
| 8.2 | Epilogue | 233 | ||||
| 8.3 | List of Abbreviations and Symbols | 235 | ||||
| 8.4 | References | 239 | ||||
| 8.5 | Index | 249 | ||||
Reynaert Steyaert
RF Power Amplifiers for Mobile Communications ACSP
RF Power Amplifiers for Mobile Communications fits in the quest for fully integrated CMOS transceivers. The book tackles both high efficiency and high linearity PA design in low-voltage CMOS, and has a strong emphasis on theory, design and implementation. The book is conceived as a design guide for those actively involved in the design of CMOS wireless transceivers
RF Power Amplifiers for Mobile Communications starts from the basic theory of power amplification from the viewpoint of CMOS integration. The design of switching RF power amplifiers in CMOS is explored and CMOS PA design at low supply voltage using parallel amplification is discussed. Combining both efficiency and linearity is one of the major issues in CMOS PA design for wireless and mobile communications and is subsequently tackled. Different linearization techniques and approaches are discussed and polar modulation is clarified in greater detail finally, two CMOS PA implementations are thoroughly covered.
RF Power Amplifiers for Mobile Communications offers the reader an intuitive insight in Power Amplification as well as the necessary mathematical background. The book is essential reading for RF design engineers and researchers in the field and is suitable as a text book for an advanced course on the subject.
ISBN 1-4020-5116-6
Index
AActive load pull, 168
Adjacent channel power, 217
AM-AM distortion, 149, 187, 202
AM-PM distortion, 149, 187, 202
AM-signal, 10
Amplitude linearity, 26
Amplitude modulator, 137, 140, 189
- linear, 142
- switching, 146
Average efficiency, 23
BBackoff, 61
Bal un, 118
Baseband filter, 180
Bluetooth, 215
Bondwires, 102
CCDF, 16
CDMA, 25, 59
Cheirex, 62
Class A, 30
- over-driven, 40
- saturated, 40
Class AB, 33
Class B, 33, 39
Class BE, 92
Class C, 33
Class CE, 92
Class D
- harmonic, 46
- switching, 49
Class E, 51, 65
Class E
- design space, 81
Class E
- in CMOS, 65
Class F, 44
- inverted, 47
Class G, 61
Class H, 61
Class S, 146
Clipping, 40
CMOS, 2
- RF, 3
- technology scaling, 84
Collector efficiency, 20
Complex envelope, 10
Compression, 61
Conduction angle, 33
Constant envelope signal, 13
Constellation
- diagram. 12
- point, 12
Conversion efficiency, 21
Crest factor, 19
Cumulative density function, 16
DDC-feed inductance, 76
Decoupling, 102
Delay compensation, 162
distortion, 157
Device stacking, 87
Differential circuit, 105
Differential delay, 157, 188
Digital
- linearization, 170
- modulation, 12
Distortion, 149
- AM-AM, 149, 187, 202
- AM-PM, 149, 187, 202
differential delay, 157, 188
- envelope filtering, 158, 189, 209
- feedforward, 151
- injection of the phase signal, 166
- memory effects, 150
- nonlinear drain-bulk capacitance, 157
- nonlinear on-resistance, 155
- PM-AM , 150
- PM-PM, 150
Doherty amplifier, 62, 129, 169
Drain capacitance, 81
- efficiency, 20
Drain-bulk capacitance, 157
EEddy currents, 99
EDGE, 178
Efficiency, 20
- average, 23
- collector, 20
- conversion, 21
- drain, 20
- improvement, 60, 169
- of modulated signals, 23
- overall. 22
- power added, 22
Envelope
- bandwidth. 159
elimination and restoration, 137
- Filtering, 158, 189, 209
- signal, 10
- variations, 14
- KVM, 184
FFDMA, 25
Feedback polar, 167
Feedforward, 151
Fixed envelope output power, 19
Foucault currents, 99
Full digital linearization, 170
GGain, 20
Gate capacitance, 80
Group delay, 163
GSM, 178
HHard switching, 49
Harmonie trap, 40
- tuning, 44
Hot carriers, 56, 80
- electrons, 56, 80
IImpedance
- matching, 111
- transformation, 111
ln-phase signal, 10
Inductor, 97
- loss, 27
- slab, 99
Input power, 20
Integrated inductor, 97
Inter-symbol interference, 181
Inverted class F, 47
ISI, 181
ISM, 215
JJunction breakdown, 56
KKhan transmitter, 137
Knee region, 32
LL-match, I 11
Lattice-type LC balun, 118, 167
Linear amplitude modulator, 142, 196
Linearity, 26
- amplitude, 26
- improvement, 62, 166
- phase, 26
Linearization, 62, 135
- back-off, 61
- digital, 170
- outphasing, 62
- polar, 135
Load
- mismatch, 207
- pull, 168
Lyapunov equation, 74
MMaximum output power, 31
Memory effects, 150
Modulated bandpass signal, 10
Modulation, 10
Moore's Law, 2
NNMOS switch, 79
Non-constant envelope signal, 14
Nonlinear drain-bulk capacitance, 157
- on-resislance, 155
OOn-chip inductor, 97
On-resistance. 79, 155
Outphasing, 62
Output power, 16
- back off. 61
- capability, 31
- lived envelope, 19
- fundamental, 18
- instantaneous, 17
- peak envelope, 19
Over-driven amplifier, 40
Overall efficiency, 22
Oxide breakdown, 56
PPackaging, 102
PAE, 22
PAPR, 19
PDF, 16
Peak envelope output power, 19
- output power, 19
- to average power ratio, 19
Phase linearity, 26
Phase signal, 10
- bandwidth, 159
- injection, 166
PM-AM distortion, 150
PM-PM distortion, 150
Polar
- feedback, 167
- linearization, 63
- modulation, 63, 135, 177, 186
digital, 172
distortion, 149, 187
Power added efficiency, 22
Power
- amplifier classification, 30
- combining network, 118, 167, 218
- control, 25, 129, 218
- gain, 20
Predistortion, 166
Probability density function, 16
- of the average output power, 25
Proximity effect, 100
Pseudo differential, 106
Pulse shaping, 180
Punch-through, 56
Push-pull amplifier, 40
QQuadrature signal, 10
Quality factor, 27
RReduced conduction angle, 33
Reliability, 55, 80
RF CMOS, 3
RF D/A power converter, 131, 171
RF phase signal, 137
bandwidth, 159
RMS, 18
SSaturated amplifier, 40
Self-resonance, 98
Shunt capacitance, 81
Skin depth, 99
Skin effect, 99
Slab inductor, 99
SM A, 199
Soft switching, 53
Spectral asymmetry, 188
Spectral mask, 183, 204
Stacked devices, 87, 118
State-space model, 69
Steady-state solution, 71
Supply voltage modulator, 137
Switching amplifiers, 48
Switching amplitude modulator, 146
Switching class D, 49
TTDMA, 25
Technology scaling, 2, 84
Time delay, 163
Time dependent dielectric breakdown, 56
Transniissionline tuning, 46
Tuned networks, 28
Two-tone signal, II, 159
UUMTS, 59, 178
VVSWR, 206
ZZero voltage switching, 53
ZVS, 53
This book tackles both high efficiency and high linearity power amplifier (PA) design in low-voltage CMOS. With its emphasis on theory, design and implementation, the book offers a guide for those actively involved in the design of fully integrated CMOS wireless transceivers. Offering mathematical background, as well as intuitive insight, the book is essential reading for RF design engineers and researchers and is also suitable as a text book.
Prof. Michiel Steyaert received his Ph.D. degree in electronics from the Katholieke Universiteit Leuven (KUL) in June 1987. In 1988 he was an associated assistant professor at the U.C.L.A. From 1989 he joined the ESAT-MICAS group at the KUL, were he is now a Full Professor. His current research interests are in analog integrated circuits for high-frequency telecommunication systems and high performance analog signal processing. He authored or co-authored over 250 papers and co-authored over 5 books. He received the 1990 European Solid-State Circuits Conference Best Paper Award, the 1995 and 1997 ISSCC Evening Session Award, the 1999 IEEE Circuit and Systems Society Guillemin-Cauer Award and the 1991 NFWO Alcatel-Bell-Telephone award for innovative work in integrated circuits for telecommunications.